LRR-TUM-Logo Department of Informatics
Technische Universität München
Informatik X: Rechnertechnik und Rechnerorganisation / Parallelrechnerarchitektur
Prof. Dr. Arndt Bode , Prof. Dr. Hans Michael Gerndt
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RAMIS

Reconfigurable Architectures
Microprocessors
Systems Design

Dr. Carsten Trinitis


 
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Objectives

The Microprocessor and Systems Design Group is studying modern microprocessor architectures and organizations. Especially, design concepts for parallel processor architectures (VLIW, superscalar and superpipelined architectures) together with the compilers and code generation techniques needed to effectively exploit the inherent parallelism have been considered in the past. The studies include also alternative computer architectures, java processor designs and microcontrollers for embedded systems. Additionally, the lectures and laboratory courses on microprocessors and microprocessor systems design are regulary given.

Traditionally, the Microprocessor and Systems Design Group is responsible for the hardware developments. During the last two years, the most important developments have been the PCI/SCI bridge and the hardware monitor for the SMiLE PC cluster. Additionally, a microprogrammble processor with AMD's Am2900 series as building blocks has been implemented for the use in the hardware laboratory (TGI).

These hardware developments could only be realized by using modern VHDL-based hardware design tools. This environment comprises tools for schematic entry, boarddesign, simulation, and synthesis. For most of our hardware developments we use programmable logic devices.

Based on this experience, a new research area will be covered by the group: reconfigurable architectures and their applications as well as the related topics hardware/software codesign and rapid prototyping.
 

Projects
  • FARM: FPGA based Reconfigurable Microprocessors

  • Using FPGA as accelerators for microprocessors and rapid 
    prototyping, especially in the Java environment.
    FPGAs as an Just-In-Time compiler for JAVA can
    reduce the compilation time dramatically, even with
    low performance CPUs.
     
  • PCI/SCI Bridge and SCI Monitor

  • As an accompanying effort to the SMiLE-project, own 
    PCI-to-SCI adapters and a sophisticated SCI monitor for
    performance and communication analysis are being developed.
     
  • A Microprogrammable Processor for Teaching

  • To demonstrate the the internal execution flow of a 
    microprocessor, software and hardware based on the 
    AMD Am2900 is being developed and used for 
    teaching purposes.
     
  • DAB: Digital Audio Broadcast

  • This project explores the capabilities of DAB for novel data 
    transmission services in cooperation with Bosch and 
    IRT (Institut für Rundfunktechnik).
     
  • JVX: Java-VHDL-Xilinx (project is finished)

  • Aiming at hardware/software co-design, an HW/SW-
    environment for translating Java programs into VHDL
    and then into Xilinx FPGAs was developed in cooperation with Siemens.

  • Computer design using the description language VHDL.

    Here are developed a microprogrammable computer, whose function can be
    studied on the sequence of a microprogramm using a graphic interface on a PC. 
    The design, the implementation and the test of the components take place with modern design tools.
  • Microprogrammable computer for the TGI practical course

    This in conventional technique realized computer for education  is finished and 
    is used with an appropriate graphic interface  in the TGI practical course.

  • Reconfigurable  architectures and systems

    In  this field we try to accelerate algorithms and dataflow by implement the 
    architecture in reconfigurable logic. We will also try to exchange the hardware dynamically at runtime like a DLL in Software.

  • Hardware Monitor for SCI-Cluster

    For the Observation of our SCI-Cluster we design a Hardware Monitor. 
    He has the abilitiy to collect  data over the distribution of the
    memory accesses in the address area. Additionally it can give a detailed
    information over the type of the accesses.
Tools
Mentor Expedition HDL-schematic entry, simulation, synthesis, signal integrity, 
board level integration and PCB design
Aldec, ActiveVHDL HDL entry and simulation
Xilinx, ISE, Foundation and Aliance VHDL entry, synthesizer and implementation 
(FPGA/CLPD)
Synopsys Simulator and FPGA Compiler on Solaris VHDL entry, simulation and synthesizer

Detailed design and development flow (in German)
 

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Georg Acher

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